Selective Harmonic Elimination Based THD Minimization of a Symmetric 9-Level Inverter Using Ant Colony Optimization

Inverter is a system that converts the acceptable voltage and output frequency from DC to AC. There are some problems in inverters including lower efficiency, high dv/dt, higher power losses and large THD [1]. A multi-level inverter is designed to solve these issues. With a three-level converter, the word Multilevel has begun, the cascaded multilevel inverter is currently in use [2]. The output of the multi-level inverter has lower harmonics than the normal output voltage of the bipolar inverter. Multilevel inverters are mainly known as a clamped diode, Flying condenser, and cascaded MLI [2, 3]. The control scheme of cascaded MLI is simple compared to other MLIs since a clamping diode and a flying condenser are not needed [4]. For more than three decades, multi-level inverters are under research and development, and successful industrial applications have been discovered [5]. Nonetheless, this is still an emerging technology, and many fresh developments have been reported in recent years [6-8]. Multilevel inverters have drawn growing interest, with the key reasons being increasing power levels, improved harmonic performance and reduced emissions of electromagnetic interference (EMI) that can be preserved with several dc stages synthesizing the output voltage waveform [7]. In systems like industrial variable-voltage drives, EVs and photovoltaic networks connected to the grid. The ongoing work offers an alternative to the design of an effective multi-level topology for high and medium-power applications.

Advanced Multi-level inverters now use fewer components and smaller carrier signals as compared with traditional multi-level inverters. A composite topology is presented in this paper having separate level generating part and polarity generating parts [8]. To increase the output of multilevel inverters in hybrid topology, first positive rates are produced with high-frequency switches and then the voltage portion is reversed with low-frequency switches [9-12]. As a result, the control circuit complexity for higher levels is significantly reduced. Selective harmonic pulse width modulation (SHE-PWM) technique with Ant Colony optimization has been used to simulate a single phase 9-level hybrid inverter. The inverter performance is evaluated about harmonic distortion (THD) [13-15]. The purpose of this research is to minimize the THD of output voltage by using low switching frequency PWM (SHEPWM) and optimization algorithm in reduced switch symmetrical 9-level inverter. The harmonic distortion generated by the proposed inverter is significantly lower, around 5% by the results obtained from simulation. This paper is organized as follows. Firstly, introduction to the multilevel inverter literature, Section-2 describes the proposed 9-level symmetric inverter topology, Section-3 presents selective harmonic elimination-based control of proposed inverter, Section-4 presents results & discussions, and finally section-5 concludes the research results.

Harmonic reduction in the multi level inverters can be done by different modulation techniques, such as; Modulation with high frequency and modulation with low frequency. Modulation strategies with high switching frequency include; sine pulse modulation, stair cased modulation, digital pulse width modulation, phase shifted modulation etc., could remove harmonics of higher order in the inverter output [5]. But high-frequency modulation strategies will not remove harmonics of the lower order such as 3rd and 5th harmonics that are dominant in nature [9].

This condition can be solved by introducing low-frequency configurations such as modulation of the space vector pulse width and selective harmonic pulse width modulations [10]. This paper proposed a SHE-PWM to reduce the dominant harmonics of lower order and the switching losses in the proposed hybrid multilevel inverter [11]. A synthesized near sinusoidal output expected to obtain from the 9-level output is shown in Figure 3.

3.1 Selective Harmonic Elimination-PWM

For the above 9-level wave form the four switching angles $\theta_{1}, \theta_{2}, \theta_{3}, \theta_{4}$ need to be generated. By considering the charact eristics of the waveform, these switching angles are the function of Fourier series expression reported in ref. [18-21].

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Figure 3. Proposed 9-Level synthesized near sinusoidal waveform

The generalized multi level inverter output is expressed by Fourier expansion:

$V_0=\sum\limits_{k=1}^{\infty }{\frac{4{{V}_{dc}}}{k\pi }}\left( \cos k{{\theta }_{1}}+\cos k{{\theta }_{2}}+......+\cos k{{\theta }_{n}} \right)*\sin k\omega t$         (1)

The necessary constraint the to be satisfied the switching angles from $\theta_{1}$ to $\theta_{n}$ is:

$0 \leq \theta_{1}<\theta_{2}<\theta_{3}<\theta_{4} \ldots \ldots \ldots<\theta_{n} \leq \frac{\pi}{2}$                       (2)

The number of harmonics to be removed in the inverter output is 2Ns-1. The order of harmonics up to 6Ns-2 for K is odd, and up to 6Ns-1, for K is even, removed from the output waveform, where K is the order of harmonics. Thus with an inverter of nine levels with two DC outputs, the 5th, 7th, and 11th harmonics must be removed, and the transcendental equations to be satisfied are as follows.

$V_{1}=\cos \theta_{1}+\cos \theta_{2}+\cos \theta_{3}+\cos \theta_{4}=M I$

$V_{5}=\cos 5 \theta_{1}+\cos 5 \theta_{2}+\cos 5 \theta_{3}+\cos 5 \theta_{4}=0$

$V_{7}=\cos 7 \theta_{1}+\cos 7 \theta_{2}+\cos 7 \theta_{3}+\cos 7 \theta_{4}=0$

$V_{11}=\cos 11 \theta_{1}+\cos 11 \theta_{2}+\cos 11 \theta_{3}+\cos 11 \theta_{4}=0$                   (3)

For optimum switching angles, modulation index (MI) is;

$M I=\frac{V_{1}}{\frac{16 V_{d c}}{\pi}}$ for $0 \leq M I \leq 1$                  (4)

The optimization strategy for the proposed nine-level MLI is taken into account in order to solve non-linear transcendental equations [18, 19]. The significant step of any optimization technique is to create a fitness function, which relates to the variables to be evaluated. The main objectives are,

1. To achieve the magnitude of the basic voltage equal to any desired or preset value.
2. To eliminate, or at least minimize, a few lower order harmonics.

The magnitude of the harmonics depends on the angles of switching. To accomplish the above objectives the fitness function (FF) takes the form as follows:

$F F=100 * \frac{\left(V_{1 d}-V_{1}\right)^{4}}{V_{1 d}^{4}}+\left(\frac{50}{V_{1}}\right)^{2} *\left(\frac{V_{5}^{2}}{5}+\frac{V_{7}^{2}}{7}+\frac{V_{11}^{2}}{11}\right)$         (5)

3.2 ANT Optimization for SHE-PWM

Ant optimization (ACO) is the first to investigate an optimal path in an evolutionary-based on ant's behavior to find a path between their colony and food source [22, 23]. Figure 4 shows the step by step procedure to be followed to implement the Ant colony optimization algorithm. This algorithm is implemented in MATLAB for the solution of transcendental equations, which provides optimized switching angles for the proposed inverter.

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Figure 4. A flow chart for Ant colony optimization