RRAM Design for Image Enhancement in Edge Devices

Resistive Random-Access Memory (RRAM) has become promising in line of substituting CMOS-based architecture because of its non-volatility, rapid switching, zero leakage power and its ability to perform in-memory computation. These attributes have RRAM especially appealing in real time image enhancement and other edge applications that require latency. Nevertheless, RRAM is the technology that is hard to practically implement in image processing pipelines despite its benefits. The first problem is the resistance state variability, which influences the correction of the programming and gives out unequal pixel transformations. Besides, thermal unsteadiness and durability deterioration diminish durability under uninterrupted write-and-read operations. The nonlinear quality of RRAM also makes it difficult to accurately map weights in CNN-based image refinement systems, and commonly necessary to use device-level parameters, including the alpha factor, by hand. Such manual dependency adds complexity to the design and reduces scalability, in particular, when multiple image profile targets or multi-stage enhancement tasks are targeted. Although the use of RRAM-based accelerator in neural computation has been considered in previous literature, the majority of the research is silent on automated optimization of the parameters. Earlier architectures are based on fixed tuning or heuristic optimization, neither of which made efforts to account for device noise, non-linear switching, retention drift and array-scale parasitic effects. Accordingly, the gap in the research is clear in coming up with an adaptive and scalable solution that is going to optimize the RRAM behavior in image enhancement systems.  To close this gap, the current paper proposes a PSO based optimization procedure to be incorporated into an RRAM computing array, where running this autonomous subsystem provides a chance to select the alpha-parameter and enhance pixel improvement, respectively. This model, which is proposed, minimizes the effects of noise in the devices, increases the consistency of converting to a particular converged state, and the stability of the converting state with temperature changes, contributing to the consistency of the output quality and the minimization of power dissipation [1].

Although designs are often performed manually or semi- automatically, these two modalities have been applied in many large-scale applications, like image processing approaches involving neural networks. Modern convolutional neural networks (CNNs) with deep learning have shown to be very effective in today's intelligent systems for a wide range of tasks, including image/speech recognition and classification. By using the memory array for the weighted sum computation, recent attempts to construct custom inference engines using the processing-in- memory design have reduced the frequent transmission of information across buffers containing calculation units. In traditional PIM systems, the convolutional layers for every 3D kernel are unrolled into the vertical row of a huge weight matrix, which is necessary because to the numerous iterations required to retrieve the input data. To generate stochastic bit-streams (SBS) that are both stable and accurate for use in stochastic computing, a probabilistic switching model is created for RRAM SNG based on physical principles. The switching probability in different operational systems may be explained by considering the physical cause of intrinsic fluctuations. Probability shift (PS), a major source of error in SBS, may be evaluated by modeling the cumulative impact between continuous cycles. Modern AI systems rely heavily on state-of-the-art deep CNNs due to their exceptional performance in image/speech identification and classification. Many other approaches, such as systolic construction, near memory computing, and the processing-in-memory (PIM) approach with cutting-edge technologies like RRAM, have been recently used in attempts to develop novel inference engines. Characteristic representations of pictures are used in several computer vision applications, such as comprehension and multi-view enrollment [2], rather than raw pixel intensity. However, there is a lack of a unified examination of these many methods, and the benefits of novel ideas or developing technology are often based on qualitative forecasts. However, conventional pipelines for generating such representations need costly storage and computational resources to perform pixel-wise analog-to- digital conversions. NeuRRAM, the first multimodal edge AI chip using RRAM CIM, offers architectural versatility across diverse models, record energy efficiency surpassing prior art at multiple computational bit precisions, and inference accuracy comparable to 4-bit software implementations. It reports 99.0% accuracy on MNIST, 85.7% on CIFAR-10, 84.7% on Google speech command recognition, and a 70% reduction in reconstruction error for a Bayesian image recovery task [3].

The use of processing-in-memory (PIM) offers a viable remedy to the von Neumann barrier by taking use of huge parallelism in an energy-efficient manner. This emerging kind of memory has lately shown its ability to construct a PIM architecture because numerous stateful logic operations, such as IMP like NOR, may be performed in parallelism in an RRAM crossbar. The memory should be utilized largely for storage, although previous synthesis processes have focused on reducing latency via stateful logic operations. that is, the majority of the crossbar is dedicated to computation rather than storage. Because of how well it boosts picture quality, Randomized Spray Retinex is a powerful image improvement method. But its adoption was impeded in many application situations, for example in internet of things systems with low hardware resources, because of the processing complexity of the method and the necessary hardware resources along with memory accesses. Image augmentation is increasingly being used to boost the efficiency of new applications because to the proliferation of AI. A new crossbar array based on resistive memory (RRAM) shows promise as a method to speed up applications using neural networks. RRAM-based CNN accelerators provide strong support for both intra-layer and inter-layer parallelism. Each network layer may operate independently with a fraction of the input data thanks to inter-layer parallelism, while intralayer parallelism produces multiple copies of kernel for each layer. But without data sharing across duplicate kernels, crossbar arrays sit idle during inference in the RRAM-based accelerators that have been presented thus far. By relying on one another's information, data dependencies are created, which slow down subsequent pipeline stages. The SET and RESET procedures in RRAM regulate the production and breakdown of conductive filament. According to the rules of thermodynamics, these procedures represent the minimum available free energy. Bends, fractures, and bubble-like patterns appear on an RRAM device when the operating voltage is too high.

RRAM is a relatively new technology that has found widespread use in boosting the processing speed of deep neural networks. The limitations of RRAM's resistance level and interfaces make it difficult to do calculations with a high degree of accuracy RRAM-based CNN accelerators provide strong support for both intra-layer and inter-layer parallelism. Each network layer may operate independently with a fraction of the input data thanks to inter-layer parallelism, while intra-layer parallelism produces multiple copies of kernel for each layer [4]. An important step in lowering AI's power consumption is the construction of devices that employ low precision neural networks using emerging memories like RRAM. Maximum efficiency of energy in such systems may be attained by tight integration of logic and memory [5]. One of the most important decision-making tools in the field of medical imaging is the computer-assisted diagnostic system. Structural MRI has lately emerged as a strong tool for diagnosing Alzheimer's disease (AD). Computer-aided diagnosis of AD is difficult because of issues with semantic feature ambiguity and significant inter-class visual similarities, as well as a lack of recognition memories in the mild cognitive impairment stages [6]. The crossbar network connectivity of RRAM [7] is made possible by the one diode-one resistors (1D1R) storage design, which is effective in suppressing crosstalk interference.

Our community can zero in on retrieving the structure-related information because various weights are allocated to various streams of the map of features. Our network can learn the complicated feature transformation incrementally using recurrent learning and then realize the color modifications without an increase in the amount for network variables. Extensive studies using publicly available datasets prove that our strategy is better. In conclusion, the following are some of our main contributions:

•To the most effective of our ability, we have pioneered the use of invertible neural networks (INN) for improving underexposed images. Our symmetric design performs unidirectional feature learning simultaneously, outperforming previous methods for improving underexposing images.

•To make color adjustments gradually without raising network parameters, we present a recurring learning strategy of transform features that makes use of a recurring residual-attention modules (RRAM).

3.1 CNN model

The building blocks of a typical CNN are a series of interleaved convolutional and fully-connected layers. Irregular neuronal levels, layers for pooling, and normalization layers may be added on top of a convolution (conv) layer as needed.

Transform Layer. The Conv layer's function of mathematics may be written as Eq. (1):

$\begin{aligned} \vec{g}(x, y, z) & =\sum h-1 i=0 \sum w-1 j=0 \\ \sum \operatorname{Cin}-1 k & =0 \vec{f}(x+i, y+j, k) \cdot \overrightarrow{c z}(i, j, k)\end{aligned}$          (1)

where the vector $\vec{f}$ a pixel-by-pixel representation of the three-dimensional input feature map $H$in $\times W$in $\times C$in; The resulting 3-dimensional structures map, denoted by the vector g, has a size of $H$out $\times W$out $\times C$out; the vector $\vec{C} \vec{Z}$ is the $z$ th size-constrained convolution kernel $h \times w \times {Cin}$;$C$out, where x, y, and z represent the coordinates of the feature maps and the convolution kernels, respectively, and n is the overall amount of compression kernels. A 4D blob may be formed in this manner $H$out $\times W$out $\times C$in $\times C$out Like a Conversion Layer.

Layer of Neurons. The Conv layer is followed by this one-to-one mapping layer $(y=f(x))$. The asymmetric Neural Level in our LBCNN architecture is configured with the standard ReLU function. Binary neurons, as suggested in BinaryNet, are utilised to quantize the activation states to a single bit. In Eq. (2), we have the forward function:

$y=\left\{\begin{array}{c}1, x>0 \\ -1, x<0\end{array}\right.$          (2)

Maximum allowable pooling thickness. Non-linear down sampling is performed by this layer, which is transmitted after the quadratic neural layer. In max pooling, the map of input characteristics is divided into rectangular portions, and the highest feasible level in each area is chosen as the associated component of the final map of features, simplifying the computation for the highest layer while maintaining local invariance.

It's the FC Layer. This is the last layer of a conventional neural network, and it connects every output and input through weights. The equation for the process is as follows:

$f_{\text {out }}(y)=\sum_{x=0}^{L_{\text {in }}-1} f_{\text {in }}(x) \cdot c(x, y)$          (3)

where, (x, L_in) is an index of the one-dimensional attributes for input map vector f_in, (y, L_out) is the value of the two-dimensional output characteristic map vector f_out, and (c, L_in, L_out) is the weight matrix.

3.2 RRAM device

A RRAM chip is a passively two-port memory that is not volatile element. As a result, the resistance range may be subdivided into several intervals, each of them representing a different bit value. In addition, the crossbar may be constructed using several other RRAM devices. The RRAM crossbar may function as an analogue convolution processor if its weights are stored in the permeability of the RRAM gadgets as well as the data is expressed by the voltage at the input signals. Currents built up by applying voltages to the input port may be read off at the output terminal. Eq. (4) gives a precise expression for the correlation between input and output voltages and currents:

$i_{\text {out }}(k)=\sum_{j=0}^{N-1} g(k, j) \cdot v_{\text {in }}(j)$          (4)

where, $\vec{v}_{i n}$, j = 0, 1, ..., N-1 represents the voltage source direction, i_out represents the current flowing at the vector's output, and k = 0, 1, ..., M-1 represents the weights, which are given by the conductance matrix, g, of the RRAM device. The function of analogy-to-digital converter is to convert digital data into analogue signals of variable amplitudes for use in input interfaces. As can be seen in Figure 1, the computation results can only be extracted from the output connection using sensor amplifiers (SAs) or ADCs. High-performance matrix-vector multiplications (MVMs) may be implemented using RRAM crossbars due to the similarity between a formula and MVMs. 

Figure 1. Image enhancement techniques

High-speed, low-power, as well as compact implementations of Conv as well as FC procedures are possible thanks to the crossbar since MVMs provide the backbone of these layers' calculations. Weight matrices for FC layers are closely related to RRAM the crossbars.

Component tensors for Conv Layers have the form ($H_{\text {out }}, W_{\text {out }}, C_{\text {in }}, C_{\text {out}}$) are flattened down into a simpler representation ($H_{\text {out }} \times W_{\text {out }} \times C_{\text {in }}, C_{\text {out }}$).

3.3 Proposed methodology

Because of its central role in the image processing pipeline, image enhancement is increasingly being employed in the medical industry in recent years. It also has a broad variety of other potential uses. However, owing to their high resolution requirements, many picture enhancing methods might be picky about which processing units they use. In this research, we describe a performance-optimized image enhancement method that takes use of RRAM's capacity for parallelism, pipelining, and reconfigurability to fulfil the need for a fast, powerful, and affordable processing unit. Figure 1 provides an overview of the colour restoration and picture enhancement system's interfaces. Image enhancement techniques aim to improve the visual quality of an image or highlight important features, and they are generally classified into point operations, spatial operations, transform operations, and pseudo-coloring methods. Point operations modify each pixel independently, using methods such as contrast stretching, noise clipping, window slicing, and histogram modeling to adjust brightness and contrast. Spatial operations enhance an image based on neighboring pixel information, including noise smoothing, median filtering, unsharp masking, low–high band-pass filtering, and zooming, which help reduce noise, sharpen edges, or enlarge images effectively. Transform operations process images in the frequency domain using mathematical transforms, enabling techniques like linear filtering, root filtering, and homomorphic filtering to enhance specific frequency components or balance illumination factors. Pseudo-coloring methods artificially assign colors to grayscale intensities—through false coloring or pseudo-coloring—to improve visual interpretation, especially in medical imaging and remote sensing. Together, these techniques form a comprehensive set of tools used across various imaging applications to improve clarity, detail visibility, and interpretability. The design takes RGB streaming input, allowing the user to choose the image width on the 'Imsize' bus, the colour balancing threshold on the 'Thi' bus, and the homomorphic filter kernel coefficients on the KernBus. Images with adjusted brightness and colour temperature are included on the output buses. The design includes a buffer for the incoming RGB channels. The buffer's many output buses are simultaneously routed to three KK homomorphic filters and six WW weight windows in the neurons. Parallel processing is used for both the filtering and the synaptic weights. The colour characterization module sends the synaptic weights and synchronised filter outputs to the colour balancing module. Colour balancing module corrects colour casts so that final photos reflect the tonality of the originals.

Quantization is essential due to the limited accuracy of RRAM-based computing systems. As shown in Figure 2, it can be divided into several key components.

Figure 2. CNN model

Scaling. To make the activation vector with out-of-range values fit within the range [-1,1], we employ linear scaling. Since the quantization occur before the ReLU operation, negative values are allowed for the normalised vectors. First, we will search the vector v_in for the biggest absolute value that can be covered by the minimal element, which is a power of 2. Then, we may express the scaling function as:

${Scale} .\left(v_{\text {in }}\right)=\frac{v_{\text {in }}}{|\alpha|}$          (5)

All quantization is uniform. Quantizing numbers may be done in a few different ways. During the training and inference   phases, we employ uniform quantization to keep things simple and eliminate the need for sophisticated quantizing processes. We will define the k-bit quantization function as:

$\hat{Q}(x)=\frac{\operatorname{round}\left(\left(2^{k-1}-1\right) x\right)}{2^{k-1}-1}$          (6)

So, we can define the whole quantization function as follows. Since the proportionality constant $\alpha$ is the product of 2 to a power of $2 \alpha$ can be simply implemented by shifting:

$v_{\mathrm{out}}=Q\left(v_{\mathrm{in}}\right)=\alpha \hat{Q}\left(\frac{v_{\mathrm{in}}}{\alpha}\right)$          (7)

Gradient Backpropagation. With continuous inputs with discrete outputs, the quantization function would have a gradient of 0 in mathematics. Back-propagated gradients are needed during training to explore the optimisation space. Therefore, to create the gradients, we use the straight-through estimated (STE, which is also widely used):

$\frac{\partial \operatorname{Cost}}{\partial v}=\frac{\partial \operatorname{Cost}}{\partial v}$          (8)

For our accelerator system to work, we need to employ the function to quantize not only the weights, but also the intermediate outputs of split blocks and the combined ultimate output (i.e., the activation of the appropriate layer). We refer to these three types of activations as "weights," "intermediate," and "merged."

A lightweight Convolutional Neural Network (CNN) is developed to enable real-time, low-power image enhancement on edge devices, integrating PSO-based hyperparameter optimization and RRAM-based in-memory computing. The proposed CNN employs a compact architecture with 3 × 3 convolutional layers, residual skip connections, and shallow feature-extraction blocks to balance accuracy and computational efficiency. PSO (Particle Swarm Optimization) is used to automatically tune key hyperparameters—including the number of filters, learning rate, activation functions, and batch size—ensuring optimal performance under edge-device constraints. After optimization, the CNN weights are mapped onto RRAM crossbar arrays, where multiply–accumulate operations are executed directly within memory, significantly reducing data-movement energy, latency, and area overhead. This synergy between PSO-optimized CNN design and RRAM-based in-memory acceleration allows the system to achieve superior image enhancement quality (higher PSNR/SSIM) while maintaining low power consumption, making it highly suitable for resource-limited edge-AI applications.

3.png

Figure 3. A-CNN model for image enhancement

Convolutional Neural Networks are widely used in modern AI systems due to their strong ability to automatically learn spatial features from images and signals. Their primary applications include image classification, where CNNs identify objects or scenes in images with high accuracy, and object detection, enabling systems like autonomous vehicles and surveillance cameras to localize and recognize multiple objects in real time. CNNs also power image enhancement tasks, such as denoising, super-resolution, contrast improvement, and low-light enhancement, making them essential in edge-AI and embedded imaging systems. In medical imaging, CNNs assist in disease diagnosis by analyzing X-rays, MRIs, CT scans, and pathological slides. They are also used in facial recognition, biometrics, and security authentication. CNNs play a major role in self-driving cars for lane detection, traffic sign recognition, and pedestrian identification. In addition, they support speech recognition, handwritten character recognition, and OCR documents. Industrial applications include defect detection, quality inspection, and predictive maintenance. CNNs are further used in remote sensing (satellite imagery analysis), agriculture (crop health monitoring), robotics, and augmented/virtual reality. Overall, CNNs form the backbone of intelligent visual and spatial processing across consumer electronics, healthcare, manufacturing, autonomous systems, and edge computing platforms.

Low-level vision tasks like picture enhancement and target recognition have benefited greatly from deep learning approaches shown in Figure 3. Because of the large amount of memory they need and the number of Floating Point Operations per Second (FLOP/s), these procedures simply cannot be run on mobile on-chip devices. As a solution to the issue of excessive parameter setup in enhancement models, this research proposes a compact convolutional neural network (CNN), which for low light picture improvement tasks, with a parameter size of less than 1 M. Therefore, given that modern quantization strategies strive for high compression ratio and are therefore unsuitable for the image improvement job, a pseudo-symmetry quantization technique is developed for enhancing image model compression shown in Figure 4.

Figure 4. RRAM design for image enhancement