Enhanced Transient Stability of a Grid-Connected Hybrid Photovoltaic (PV)-Battery System Using LLC-CLLLC Resonant Converters and Adaptive Cycle-by-Cycle Current Limiting

Figure 1 depicts the architecture of the proposed system. The following are some of the key innovations of the proposed system: its unique topology, dual PI control, multivariable mode operation, predictive control technique, and transient current limitation scheme described in the preceding section.

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Figure 1. Block diagram of the proposed grid-connected hybrid PV-battery energy system

In particular, the PV array is interfaced with the common DC-link through a full-bridge LLC-RC, where the switching frequency is calculated according to the MPPT-based pulse frequency modulation (PFM) control. For the proposed structure, the PV side controller controls the PV power extraction and generates the switching frequency of the LLC-RC. Moreover, the BESS is interfaced with the common DC-link through a full-bridge CLLLC-RC, allowing for bidirectional energy flow both in charging and discharging modes for the battery. In particular, the performance analysis of the battery-side converter is carried out with the above control techniques. In particular, the above control signal is given to the frequency generation block, and then, after some calculations, the switching frequency of the battery-side CLLLC-RC is generated. The common DC-link is interfaced with the distribution network through a three-phase voltage-source inverter with LCL filtering. On the other hand, the phase-locked loop (PLL) algorithm is utilized to keep synchronized with the grid in the grid-side controller, and the synchronous dq-axis control of the grid-side active and reactive power flow is carried out. This section introduces the power flow coordination algorithm, PV side controller design, and three different types of controllers used for the battery side converter. BESS are coupled with PV generation systems in order to store excess energy generated from solar sources and deliver it when the generation capacity is not enough. Power available at the DC bus is defined as follows in Eq. (1).

$P_{D C}=P_{P V}+P_{ {bat }}-P_{{grid }}$          (1)

where, $P_{P V}, P_{ {bat }}$, and $P_{ {grid }}$ are the PV , battery, and grid-side powers, respectively.

Power electronic converters form the critical interface between PV arrays, energy storage systems, and the utility grid. Traditional hard-switching DC–DC converters experience considerable switching losses when operating at high frequencies. The instantaneous switching power loss in a MOSFET can be approximated as in Eq. (2).

$P_{s w}=\frac{1}{2} \times V_{D S} \times I_D \times\left(t_r+t_f\right) \times f_s$          (2)

where, $V_{D S}$ is drain-source voltage, $I_D$ is drain current, $t_r$ and $t_f$ are rise and fall times, $f_s$ is switching frequency.

2.1 Photovoltaic array

The PV array is the main energy provider of the proposed hybrid system, whose purpose is the conversion of solar energy into electrical energy. Due to the nonlinear behavior of the PV array and the impact of external parameters on it, precise modeling of the PV array becomes highly significant.

The PV module’s output power is dictated by the basic formula given below in Eq. (3).

$P_{P V}=V_{P V} \times I_{P V}=\eta \times G \times A_{P V}$          (3)

where, $\eta$ is module efficiency, $G$ is solar irradiance (W/m²), $A_{P V}$ is the array area (m²).

This strong dependence on irradiance G creates power imbalances in grid-connected systems.

Table 1 provides details of the major electrical parameters of the hybrid PV-battery energy system.

Table 1. Main specifications of the proposed system

In order to ensure that the maximum amount of energy is harvested from the PV array depending on varying conditions of irradiance and temperature, the point of operation keeps changing using the MPPT algorithm. The output of this algorithm is used to generate the switching frequency signal for the PV side LLC-RC converter, as shown in Figure 2.

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Figure 2. Maximum power point tracking (MPPT) PFM control using voltage-controlled oscillator (VCO) implementation in LLC resonant converter at PV side

The PV operating point is tracked using the perturb-and-observe MPPT algorithm. The resulting normalized control voltage drives the VCO and determines the LLC switching frequency, as formulated in the following subsection.

2.2 Steady-state analysis and resonant tank design of the LLC-RC

LLC-RC has two resonant frequencies. First, the resonant frequency $f_{r_1}$ can be calculated based on resonant inductor $c_{r}$ and resonant capacitor $f_{r_2}$ using Eq. (4) below. Second, the resonant frequency $f_{r_2}$ depends on $L_{r}$, $C_{r}$ and magnetizing inductance $L_{m}$ using the relation provided in Eq. (5). DC voltage gain of the LLC resonant converter can be found using fundamental harmonic approximation (FHA) [13, 14] using Eq. (6) below.

Figure 3 represents the linear AC model of the LLC resonant converter.

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Figure 3. Linear AC equivalent circuit model of the LLC-RC based on fundamental harmonic approximation

$f_{r 1}=\frac{1}{2 \pi \sqrt{L_r C_r}}$          (4)

$f_{r 2}=\frac{1}{2 \pi \sqrt{\left(L_r+L_m\right) C_r}}$          (5)

${Gain}(G)=\frac{n * V_{o e}}{V_{g e}}=\frac{s L_m / / R e}{\frac{1}{s C r}+s L r+s L_m / / R e}$          (6)

where,

$n$ is the transformer ratio,

$V_{g e}$ is equivalent input voltage,

$ V_{o e}$ is equivalent output voltage.

The quality factor Q is defined in Eq. (7), it represents the system’s ability to store energy, and mathematically, it is expressed as:

$Q=\frac{X_L}{R_e}=\frac{X_c}{R_e}$          (7)

Re: Reflected resistance represents the reflection of the output load through the transformer to the input side and is mathematically represented in Eq. (8)

$R_e=\frac{8}{\pi^2} \times n^2 \times Rout$          (8)

The inductance ratio can be expressed as in Eq. (9)

$m=\frac{L_r+L_m}{L_r}$          (9)

where,

$L_r$ is the resonant inductor,

$L_m$ is the magnetizing transformer inductance,

$c_r$ is the resonant capacitor of HFPT.

Therefore, when the power is transferred from input source $V_{ge}$ to output $V_{oe}$ , it is named as forward power transfer, and the gain is expressed as Eq. (10)

$G=\frac{1}{\sqrt{\left(1+\frac{1}{m}\left(1-\frac{1}{f_x^2}\right)\right)^2+\left(f_x-\frac{1}{f_x}\right)^2 Q^2}}$          (10)

where, $F_x$ is the normalised frequency and it is expressed as in Eq. (11)

$F_x=\frac{f_s}{f_r}$          (11)

where,

$f_s$ is the switching frequency,

$f_r$ is the resonant frequency.

So, the point of gain will move according to operating conditions, but it will be near the resonant frequency at which it is selected in the proposed design. The gain is a function of the inductance ratio (m), the quality factor (Q) and the normalised frequency ($F_x$) as shown in Figure 4.

Based on the required gain and the coordination between the normalized frequency and the gain illustrated in Figure 4, the inductance ratio is selected as 6.9, while the quality factor is set to 1 (Q = 1).

Since no voltage step-up or step-down is required, the converter is mainly utilized for galvanic isolation and integration with the resonant tank. Therefore, the high-frequency power transformer (HFPT) turns ratio is selected to be unity (1:1), which means that n = 1.

Parameters of the optimum LLC-RC used in connecting the PV array to the common DC link are stated in Table 2. The resonant inductor, magnetizing inductor, and the value of the resonant capacitor have been selected such that they ensure soft switching throughout the operating range, along with being efficient and having a wide ZVS capability. Frequency control-based power regulation becomes efficient due to the switching frequency ranging from 50 kHz to 100 kHz; efficient frequency control-based power regulation becomes possible using the MPPT controller.

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Figure 4. Normalized voltage gains characteristics of the LLC-RC for different quality factor (Q) values at inductance ratio m = 6.9

Table 2. Design parameters of the LLC-RC

The LLC-RC is a key component in the proposed scheme, as it ensures efficient and high-frequency switching of power from the solar panel to the DC link. By virtue of its controlled-frequency operation, it becomes possible to synchronize it with the MPPT operation for optimal power capture. The adoption of resonant conversion makes the system highly efficient and reliable.

2.3 Steady-state analysis and resonant tank design of the bidirectional CLLLC-RC

The FHA equivalent circuit of the bidirectional CLLLC-RC is shown in Figure 5.

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Figure 5. Linear AC equivalent circuit model of the CLLLC-RC based on fundamental harmonic approximation

In contrast to other converters, CLLLC-RC converter can achieve symmetrical operation in both directions of power flow.

With regard to the bidirectional CLLLC-RC converter based on the basic harmonic approximation, two symmetrical resonant tanks at the two opposite sides will ensure identical soft-switching performance in both directions of power flow. For the symmetrical bidirectional CLLLC converter, the secondary-side resonant elements are referred to the primary side through the transformer turns ratio n = N_p/N_s. The symmetry conditions are expressed as [15]:

$L_{r 1}=n^2 L_{r 2}$          (12)

$C_{x 2}=n^2 C_{x 1}$          (13)

Accordingly, the referred secondary-side resonant parameters become identical to the primary-side parameters:

$L_{r 2}^{\prime}=n^2 L_{r 2}=L_{r 1}, \quad C_{r 2}^{\prime}=\frac{C_{r 2}}{n^2}=C_{r 1}$          (14)

This equivalence enables the converter to exhibit similar resonant and soft-switching characteristics in both power-flow directions. The characteristic impedance of the referred symmetrical resonant tank is defined as

$Z_r=\sqrt{\frac{L_{r 1}}{C_{r 1}}}$          (15)

The primary-side series resonant impedance at the switching frequency is

$Z_{r 1}\left(j \omega_s\right)=j \omega_s L_{r 1}+\frac{1}{j \omega_s C_{r 1}}$          (16)

For completeness, the secondary-side series resonant impedance and its value referred to the primary side are

$Z_{r 2}\left(j \omega_s\right)=j \omega_s L_{r 2}+\frac{1}{j \omega_s C_{r 2}}$          (17)

$Z_{r 2}^{\prime}\left(j \omega_s\right)=n^2 Z_{r 2}\left(j \omega_s\right)$          (18)

For battery energy storage applications, the CLLLC-RC regulates the battery charging current $I_{bat}$. The average charging current in the resonant mode is related to the converter parameters by Eq. (19).

$I_{b a t}=\frac{8}{\pi^2} \times \frac{n \times V_{D C}}{2 \times Z_r}$          (19)

where, $n$ is the transformer turns ratio, $ V_{D C}$ is the DC bus voltage, $Z_r$ is the tank impedance at resonance. The above equations lay down the theoretical basis for the proposed system design presented below. Table 3 below presents the parameters of the bidirectional CLLLC-RC used as the battery interface. The design of the resonant tank is symmetric in nature to enable soft-switching bidirectional power flow in both charging and discharging modes. The values of the resonant inductor, magnetizing inductor, and capacitor are designed to provide optimum resonance over the resonant frequency range from 25-50 kHz. The values of the above parameters make possible the efficient integration of batteries into the proposed system.

Table 3. Design parameters of the CLLLC-RC

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Figure 6. Normalized voltage gain characteristics of the CLLLC-RC for different quality factor (Q) values at inductance ratio m = 3.85

One of the most vital elements in the proposed hybrid system is the CLLLC-RC because it enables the transfer of power effectively between the battery and the DC buses. The stability of the operation of the converter at any moment and quick response can be achieved owing to the symmetrical nature of the design and dual-loop control strategy in a stable manner at any time and provide rapid dynamic responses with maximum efficiency.

Figure 6 shows the normalized voltage gain characteristic of the designed CLLLC-RC converter. The frequency at which the switching occurs is chosen based on the design of the resonant tank and is normalized with respect to the second resonant frequency. The shaded area denotes the resonance operating region between the two resonances where the converter can control the voltage gain with the needed resonant properties. The operating region lies within this shaded area, which helps to maintain soft-switching operations. Design parameters for the converter are summarized in Table 3.

2.4 Battery mathematical model

The BESS is a crucial part of the hybrid PV battery architecture design, offering services like energy storage, load levelling, and power flow control in both directions. Through the BESS, the system can operate effectively in response to the variability in solar radiation and changing load conditions.

For system-level analysis, the battery is modelled using a Thevenin equivalent circuit, consisting of:

$V_{ {bat }}=V_{ {oc }}-I_{ {bat }} R_b$          (20)

where,

$V_{ {bat }}$ = battery terminal voltage,

$I_{ {bat }}$ = battery current (positive for discharging, negative for charging).

The State of Charge (SOC) represents the available energy in the battery and is a key parameter for control and energy management, as given in Eq. (21).

${SOC}(t)={SOC}\left(t_0\right)-\frac{1}{C_{ {bat }}} \int_{t_0}^t I_{ {bat }}(t) d t$          (21)

where,

$C_{ {bat }}$ = battery capacity in ampere hour (Ah).

2.5 Control strategies of the bidirectional CLLLC-RC

The conventional bidirectional current-control scheme regulates the battery current during both charging and discharging, as shown in Figure 7.

One disadvantage of using the traditional bidirectional PI controller is that it controls only the battery current during charging and discharging but does not control the secondary-side voltage directly. Therefore, the voltage control and the switch over to constant voltage mode have not been considered. In order to counteract this problem, the proposed coordinated dual-loop PI controller is such that it uses both current and voltage control loops to enable the control of battery current as well as the secondary-side voltage. The dual-loop controller is the major control technique used in this case, especially the bidirectional CLLLC-RC. This enables control of the dc bus voltage and battery currents simultaneously for proper system performance in both charge and discharge modes. Figure 8 shows the structure of the bidirectional CLLLC-RC control technique.

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Figure 7. Block diagram of the conventional bidirectional current PI control

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Figure 8. Block diagram of the dual-loop controller in bidirectional CLLLC-RC

V_sec and I_batt denote the measured secondary-side voltage and battery current, respectively, while V_ref and I_ref are their corresponding reference values. The coordinated controller output u_VCO represents the normalized control signal applied to the VCO, which generates the switching frequency fs of the CLLLC-RC. The VCO maps the normalized control signal u_VCO into the switching frequency fs, according to the frequency range determined from the FHA-based converter design. Traditional CC-CV charge controllers are based on separate control schemes for current and voltage regulation. However, a mismatch in controller design due to mode change can cause a discontinuous control process resulting in current overshooting [16]. In a CLLLC-based battery charger, such a disturbance is likely to affect the DC-bus voltage as well. As a solution for the above-discussed problem, the voltage and current-loop control signals are integrated to create one unified VCO input. Unlike the traditional MIN-selector that enables only the more constraining control loop, in this case, both loops can be active at the same time to generate the frequency control signal. When tuned properly, the dual-loop controller will control battery current and secondary-side voltage, providing a smoother control process and better transient dynamics. Table 4. Comparison of the conventional MIN-selector and the proposed summation-based dual-loop control architectures. Comparison of the structural and dynamic characteristics of the traditional minimum selector (MIN-selector)-based CC-CV control and proposed dual-loop control architecture.

Table 4. Comparison of conventional and proposed dual-loop PI control architectures

The five parameters of the dual-loop scheme were tuned sequentially. The current loop was tuned first, with the voltage loop disabled and the frequency command constrained to the inductive region of Figure 6 to preserve ZVS; the voltage loop was then tuned one decade lower in bandwidth so that both commands superpose at the VCO input without interaction; and K_lim was set to the smallest value suppressing the transition overshoot without activating in steady state. The predictive controller instead requires only the two cost-function weights, trading offline tuning effort for online computation. To provide a comprehensive comparison of the control performance, with particular emphasis on transition stability, a predictive frequency-control strategy is additionally evaluated, whose block diagram is shown in Figure 9. Although predictive control offers fast dynamic response, its full-system implementation may impose considerable computational burden and control complexity [17]. Therefore, the predictive strategy is not applied to the entire conversion system. Instead, it is restricted to the bidirectional CLLLC-RC, where the switching frequency is selected directly as the control output. This frequency-only predictive formulation reduces the number of optimized variables and online calculations while preserving the main dynamic benefits of predictive control, particularly during operating-mode transitions. Figure 10 presents the operation flowchart of the proposed MPC algorithm, highlighting the main computational steps during each control cycle.

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Figure 9. Block diagram of the frequency predictive control strategy for the bidirectional CLLLC-RC

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Figure 10. Operational flowchart of the proposed MPC algorithm

In every control interval, the predictive control method initiates the frequency selection procedure, calculates a set of finite switching frequencies, determines the battery current for each of these candidate frequencies by using the FHA model, and formulates the cost function incorporating both the error of current tracking and the cost associated with changing frequency. The candidate that results in the smallest cost function value is taken to be the optimal switching frequency and is saved into memory for the next control interval. Symbols used in Figure 10 are defined in Table 5.

Table 5. Nomenclature of symbols used in the model predictive control (MPC) algorithm flowchart (Figure 10)

The computational complexity of the formulation may be directly calculated using the algorithm depicted in Figure 10. For every control cycle, the 40 candidate switching frequencies are examined. Given that the candidate set is predefined during the design process, all quantities depending only on the switching frequency, such as the reactances of the resonant tank, the magnitude of the equivalent impedance and the prediction coefficient, are constant and can be calculated once prior to the controller implementation by filling up the look-up arrays, whose memory size amounts to 320 bytes. The online calculation for each candidate thus requires only two multiplication, one subtraction, one squaring and one comparison operation in single precision floating point arithmetic, without requiring any division, square-root or exponentiation operation. The whole process is completed within about 3.5 µs on an STM32G474 (Cortex-M4F, 170 MHz) and 2.0 µs on a TMS320F28379D processor, which is below 20 % of the switching period at the maximum operating frequency. The frequency-only formulation is therefore suitable for per-cycle operation on general digital control hardware, unlike finite-control-set predictive control methods, where the number of calculated switching combinations increases with the prediction horizon.

2.6 Grid-side inverter and LCL filter design

Lastly, the controlled DC-link voltage is connected to the grid via a three-phase voltage source inverter (VSI) along with an LCL filter. The inverter makes use of a sinusoidal pulse width modulation (SPWM)-based synchronous reference frame control technique to control active and reactive powers [18], while the LCL filter eliminates the switching harmonics and ensures good quality grid currents at the point of common coupling (PCC). In the grid-assisted battery charging mode, the bi-directional VSI acts as an active pulse width modulation (PWM) rectifier controlling the DC-link power while taking a near sinusoidal grid current at unity power factor. The LCL filter applied at the grid interface is responsible for the elimination of harmonics [19]. The harmonic attenuation ratio at frequency $f_h$ is Eq. (22). Design specifications of the grid-side inverter and LCL filter are tabulated in Table 6.

$\left|H_{L C L}\left(f_h\right)\right|=\frac{1}{\left|1-\left(L_1+L_2\right) \times C \times\left(2 \pi f_h\right)^2\right|}$          (22)

where, $L_1$ is the inverter-side inductance, $L_2$ is the grid-side inductance, $C$ is the filter capacitance.

Table 6. Grid-side inverter and LCL filter specifications

This paper proposes a hardware based current limiting method for transient improvement and mode transition of grid connected hybrid PV Battery systems with resonant converter. Though there have been several studies on grid connected resonant converters, only limited works have focused on how to protect the power switch from potential current surges during their transitional stages. The proposed current limiting method consists of a fast-comparing unit and a logic gate controller to control the current cycle-by-cycle.

The proposed cycle-by-cycle current-limiting mechanism compares the measured battery current with an adaptive threshold defined as:

$I_{{lim }}=K_{ {lim }}\left|I_{{ref }}\right|$          (23)

where,

$I_{{lim }}$ is an adaptive current limit,

$K_{ {lim }}$ is current limiting coefficient.

Under normal conditions, the comparator output enables the switching pulses generated by the pulse-frequency unit. When

$\left|I_{ {bat }}\right|>I_{ {lim }}$

The logic gate suppresses the corresponding switching pulse. Once the current returns below the prescribed limit, normal pulse transmission is restored. This hardware-assisted action operates at the switching-cycle level and provides fast overcurrent intervention without modifying the primary control structure. As can be seen in Figure 12, the proposed technique monitors the battery current and then compares the value with that provided by the adaptive limit. If the current value exceeds the threshold previously defined, then there will be inhibition of switching pulses for temporary duration. The end product will be current restriction cycle-by-cycle.

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Figure 12. Proposed adaptive hardware-assisted cycle-by-cycle current limiting scheme for smooth mode transition and converter protection

Unlike the existing techniques, the proposed technique uses hardware-assisted current restriction technique that restricts current cycle-by-cycle without any effect on the main control technique. Existing techniques only solve the problem of overcurrent protection during the occurrence of fault conditions or overload or transition of power using control-based approaches but not current.

The proposed technique utilizes current regulation during normal operations, especially during mode transition because of overshoot and oscillations during mode transition periods. The proposed technique uses an adaptive current comparator along with a logic gate.

Furthermore, while conventional research works are generally limited to single converter systems, the suggested approach targets implementation within a grid connected hybrid PV-battery system with various operating modes. Apart from offering improved transient performance, such a setup will make it possible to enhance the integration process, thanks to the reduced need for abrupt power input during mode changeover.

As a result, the suggested approach offers not only current limitation, smooth transition between modes and system stability, which represents an important improvement over the existing technologies. Hardware-based methods for current reduction during transition include negative temperature coefficient thermistor (NTC) inrush current limiters, current-limiting resistors and pre-charge systems. Although all of these approaches manage to significantly reduce the level of current spikes, they depend on extra passive elements or switches. The proposed adaptive cycle-by-cycle current limiter provides transient overcurrent suppression through switching action without using any additional pre-charge circuitry.

The limiter of Figure 12 was modelled using an ideal comparator and an ideal logic gate. In a physical implementation, the sensing, comparison, gating, and gate-drive stages

together introduce a propagation delay of the order of 150–200 ns for commercially available fast components. Relative to the shortest switching period of the CLLLC-RC (16.7 µs at 60 kHz), this delay represents approximately 1% of a switching cycle, so the limiter still acts within the cycle it is intended to terminate. The delay produces a small and deterministic overshoot beyond the programmed threshold, which can be compensated at design time through the coefficient $K_{lim}$.