PI Optimized Cuckoo Search Algorithm for Single Phase Grid Tied PV Inverter with SEPIC Converter

In the recent days, the Photo voltaic energy is widely utilized in all the countries and the Governments are trying to find more ways to satisfy the electrical requirements of the country with solar energy. Practically it is easier to implement and cost effective than other sources, which includes complex installation with highly expensive units of power generation; adding to that, this PV power is non-polluting and it requires less maintenance, because of which it is highly preferable in multiple structures. The photovoltaic power generators can be kept or installed at any place and the operation of PV is safe and quiet. In photo voltaic technique, the power is generated when the semiconductors material is hit by the sunlight. In the PV fed system, the input current with discontinuous operation and oscillatory output voltage have been gained with the effect of partial shading and highest ripple. A PV fed zeta converter is developed by evaluating the mathematical notations [1]. The MPPT algorithm is utilized for tracking the output power from the PV panel and this technique includes SEPIC converter with PWM for reducing the difficulty of the system [2]. A buck converter is developed with zeta, which includes inductors and capacitors by utilizing a sliding mode controller, the performance of which is compared with other converters [3]. For wind power generation, a synchronous generator with permanent magnet is linked with rectifiers. The reference voltage is made as constant with respect to the voltage in the open circuit of zeta converter yet maintaining a stable voltage is difficult [4]. Pazhampilly et al. [5] have discussed about the PV fed MPPT technique with incremental conductance feedback current and voltage. In consideration with various types of converters, MPPT is presented for extricating the power from PV system and the total output power of the system is comparatively lower than the other existing techniques. In this works [6], a fuzzy logic controller (FLC) is utilized for the extraction of highest output power. The FLC has utilized the Mamdani’s technique as the convergent and divergent membership function of PV system. A zeta converter is fed with PV array for MPPT [7]. The Researchers have evaluated the fuzzy logic controller, which utilizes the code tree format along with the P&O algorithm of MPPT tracking in the PV panel [8]. AC voltage is generated by utilizing a Zeta converter and the generated power is given to the 3-phase rectifier by providing the desired outputs [9]. BLDC motor with minimum switching losses including a tracking Algorithm is utilized [10]. P & O control technique is utilized for PV system with MPPT and a comparison is done between the SEPIC and BOOST converter [11]. A modified SEPIC converter is created for minimal switching voltage and high static gain, along with that, a modified SEPIC configuration is used through magnetic coupling to attain reduced input voltage performance [12].

A modified MPPT technique is utilized for SEPIC converter with fuzzy logic control for limiting the voltage variation [13-16]. A PV fed SEPIC converter is presented with fuzzy controller [17]. Fuzzy is used for maintaining the voltage as constant at various load conditions. A modified technique for solar PV voltage tracking is utilized with SEPIC convertor. Incremental conductance technique is utilized for MPPT and implemented in MATLAB [18, 19]. The performance of the system with respect to THD & Output efficiency is differentiated by the converter [19]. Hence the desired output voltage is gained by setting the output voltage [20]. Though there are a number of developed methods and modified techniques, each of them has lacked in a certain criterion. Hence in this work, a single-phase PV integrated grid with SEPIC converter is analyzed, in which a closed loop control is executed by cuckoo search-based optimization thereby retaining the link voltage. Grid synchronization is also accomplished by a PI controller.

The organization of the paper is as follows: the description of the proposed system is given in section 2 and in section 3, the analysis of the PV model; the proposed converter and its control algorithm are presented. The results and discussion of the proposed work are given under section 4, with the conclusion following in section 5.

A) Modelling of PV Panel

A traditional PV system is presented in Figure 3.

3.png

Figure 3. Model for one diode PV system

where, the PV current is denoted as l_PV, diode current is denoted as I_D, the resistance in series is denoted as R_s the resistance in shunt is denoted as R_sh, the output current is denoted as I and the output of PV voltage is denoted as V.

Photo Voltaic panel current is given below;

$I=I_{P V}-I_{O}\left[e^{\frac{\left(v+R_{S} I\right)}{V_{k} \propto}-1}\right]-\frac{V+I R_{S}}{R_{S h}}$               (1)

where, I_O represents PV saturation current, V_k represents the high thermal voltage and $\alpha$ represents the ideality constant of diode.

Four Photo Voltaic panels are used in this proposed method. SEPIC converter is fed by the obtained photo voltaic output.

B) SEPIC Converter

The input voltage can be increased or decreased through a converter known as SEPIC Converter. This is basically a boost converter, in which the operation is differentiated in two modes. They are:

•  CCM
•  DCM

CCM

In this mode, the current in the inductors L₁ and L₂ is constant and never drops to zero, which prevents the inductance from fully discharged. C_in is equal to that of V_in during the steady state operation of SEPIC converter and the current flowing through C_in is 0A. Output load is independent of V_in and is equivalent to the average current of L_2.

In CCM, sum of voltage across the energy storage element of SEPIC converter has been equivalent with input voltage (input and output filter capacitors C_in and C_o are excluded) which is given below,

$V_{\text {in }}=V_{L 1}+V_{C i n}+V_{L 2}$                  (2)

Here the average voltage across C_in is same as V_in,

$\mathrm{V}_{\mathrm{L} 1}=-\mathrm{V}_{\mathrm{L} 2}$               (3)

In steady state, CCM of SEPIC converter takes place in two ways based on the ON and OFF state of switch S. To study the function of SEPIC converter in CCM, it is essential to know the condition of switch S.

ON state of switch S

Figure 4 explains the function of SEPIC converter in the ON state of switch S. In steady state, no current has been flowed through the filter capacitors C_in and C_o till they are discharged. Ripple in the SEPIC’s converters input and output voltages becomes zero when the capacitance C_in and C_o are large.

4.png

Figure 4. Switch on condition

During the first half-switching cycle i.e., in ON state, the current through L₁ and L₂ have increased both in positive and negative direction. Here L₁ and L₂ have charged and discharged through V_in and C_in. In the short period of time, the switch S remains closed, at this instant, the instantaneous voltage across C_in is equal to V_in. V_L1 and V_L2 are equal with magnitude V_in.

OFF state of switch S

Figure 5 explains the operation of SEPIC when switch S is open or in OFF state. L₁ and C_in are the new path for the input current. Inductor current has not changed immediately since the inductor L₁ is equal to the capacitor current C_in and current L₂ remains to discharge. C_o discharges in the half-switching cycle thus D turns on and supplies the current to the load.

5.png

Figure 5. Switch off condition

Here, the input current is added by the current flows in the direction of L_2, which also flows to the output load that draws current from the inductance L₁ and L₂ when the switch S is in the OFF state. C_in is charged by V_in and L₁ (when switch S conducts during half switching cycle is discharged), and to the next half switching cycle, the switch S conducts the current to the load output till L₂ continues in discharging (L₂ is charged by the current that is supplied by C_in).

DCM

The inductor current becomes zero in this mode of operation. For significant time period, the current through L₁ and L₂ remain at 0A. In less load current, it has maximum efficiency while operating this converter in DCM but needs more operating at maximum load current. Hence it yields more efficiency in this operation. SEPIC converter contains capacitance and Inductance, which aids to work in continuous mode with respect to the duty cycle in Eq. (4).

Duty Cycle:

$D=\frac{V_{{OUT}}\,\,+V_{{D}}}{V_{{IN}}\,\,+V_{{AN}}\,\,+V_{{D}}}$                 (4)

where, V_OUT represents the output voltage, V_D represents the voltage across the diode and V_IN represents the input.

Inductor and capacitor output value has been given as,

$L_{1}=L_{2.3}=\frac{V_{I N} \times D_{\max }}{I_{1} \times f_{S}}$                     (5)

$\mathrm{C}_{2}=\frac{{I}_{0} \,\,\times {D}_{\max }}{{V}_{\text {ripple }} \,\,\times \mathrm{V}_{\mathrm{D}} \times \mathrm{f}_{\mathrm{S}}}$                      (6)

I_o =Current output

V_ripple = Voltage ripple

D_max = Diode maximum value

V_D = Voltage in Diode

f_s = Switching frequency

Load Resistance is given as,

$\mathrm{R}=\frac{\text { Vout }}{\text { Iout }}$                   (7)

Here Vout and Iout represents the output Voltage and current respectively.

Current through the inductor is given as,

$\Delta \mathrm{I}_{\mathrm{L}}=\frac{\text { IouT.V }_{0} \cdot 40 \%}{\mathrm{~V}_{\mathrm{IN}}}$                         (8)

RMS current in the output capacitor is given as,

$\mathrm{I}_{\text {out }}(\mathrm{RMS})=\mathrm{I}_{\text {OUT }} \times \sqrt{\frac{\text { Dmax }}{1-\text { Dmax }}}$                  (9)

RMS current of coupling capacitor is given as,

$I_{\mathrm{C} 1}(\mathrm{RMS})=I_{\mathrm{IN}} \times \sqrt{\frac{\text { Dmax }}{1-\text { Dmax }}}$                  (10)

Voltage ripple of coupling capacitor C₁ has been mentioned as,

$\Delta \mathrm{VC 1}=\frac{{I}_{{OUT}}\,\,\, \times {D}_{{Max}}}{{C}_{1} \times {F}_{{S}}}$                     (11)

C) Control Strategies for SEPIC converter

Proper control of SEPIC converter is vital and this is accomplished by CS algorithm, which results in uniform output voltage of the converter. A comparator is utilized for differentiating the actual and reference values of link voltage. The error signal is given to PI controller and by CS Algorithm, the control parameters are turned as fine. As a result, reference signal is generated by the controlled parameters and differentiated with the carrier wave. Owing to this, pulses are generated and fed to SEPIC converter.

Cuckoo search Algorithm

The Cuckoo Search (CS) algorithm is influenced through the breeding performance of cuckoos, which is introduced by Yang and Deb. An impressive aspect of certain cuckoo species is the parasitism of the brood. In the nests of other birds, female cuckoos lay their eggs, which looks the same or different. If the host bird finds out the egg, these alien eggs are killed or the nest is destroyed and a new one is established at anywhere. Cuckoos use various techniques namely mimicking the colors of host eggs, selects finest nest and improves the ability to imitate the call of host chick to maximize the feeding opportunities to rise the chance of producing a novel cuckoo and to decrease the possibility of the demolition of eggs by the host birds. The parasitism of cuckoo brood is listed below,

1. Every cuckoo puts single egg and randomly dumps it into the nests of another bird species.

2. The Finest nests has been taken for the next generation of high quality eggs.

3. The quantity of available host nests has been set and it is often possible for host bird to find the cuckoo’s eggs and throw it out. The pseudo code for CSO is illustrated as follows:

To efficiently hunt for a novel nest, the performance of cuckoos is related with Levy flights in CSA. Levy flights illustrate the method of random walks, which are defined by the phase lengths and followed a distribution of power law. The Levy flight is expressed as,

$x_{i}^{g+!}=x_{i}^{g}+\alpha^{\prime} \otimes \operatorname{Lev} y\left(\lambda^{\prime}\right)$                (12)

where, the number of current generation is denoted as g, i.e. $g=1,2, \ldots$ max $-$ cycle and the number of pattern is denoted as $i, \alpha^{\prime}>0$ is the Levy flight’s step size that controls the flight scale, entry-wise multiplication is denoted as $\otimes$, Levy supply includes endless changes with the endless mean, which is denoted as $Levy\left(\lambda^{\prime}\right)$.

$\operatorname{Levy}\left(\lambda^{\prime}\right) \sim s^{-\lambda^{\prime}}$ avec $\left(1<\lambda^{\prime} \leq 3\right)$                  (13)

where, the step size is denoted as s. Through the similar performance of a constant Levy supply, two generally dispersed stochastic random parameters have produced the transfer possibility to shift it from the current position to the next position. The generation of next nests is expressed as,

$x_{i}^{g+!}=x_{i}^{g}+$ stepsize.randn                 (14)

where, the random value between zero and one has been denoted as randn. The step size is expressed as:

stepsize $=\alpha^{\prime} .$ step. $\left(x_{i}-x_{\text {best }}\right)$                (15)

where, the $\left(x_{i}-x_{\text {best }}\right)$ is the difference factor which is utilized to choose the apt results. The step factor has been expressed as,

step $=\left(\frac{\sigma\left(\lambda^{\prime}\right) \cdot \operatorname{ran} d n}{\operatorname{randn}}\right)^{\frac{1}{\lambda^{\prime}}}$                     (16)

where, the standard deviation is denoted as $\sigma$ and it is expressed as,

$\sigma\left(\lambda^{\prime}\right)=\left(\frac{\Gamma\left(1+\lambda^{\prime}\right) \cdot \sin \left(\pi \lambda^{\prime} / 2\right)}{\Gamma\left(\left(\frac{1+\lambda^{\prime}}{2}\right) \cdot \lambda^{\prime} \cdot 2 \frac{\lambda^{\prime}-2}{2}\right)}\right)^{\frac{1}{\lambda^{\prime}}}$                    (17)

The strength of the CS algorithm lies in how the solution space is manipulated and explored by a cuckoo. To find best solutions, this cuckoo has some ‘intelligence’. The PI controller is tuned with CS algorithm and depending on the tuned parameters, the pulses for the SEPIC converter is generated with the aid of PWM generator.

The construction of $1 \Phi$DC link potential controller of PV inverter is given in Figure 6. The PV inverter voltage (V_dc) has been given to LPF to minimize the ripples in switching. The filtered DC link potential and reference voltage $\left(V_{d c}^{*}\right)$ is given to PI to control the DC link voltage.

6.png

Figure 6. Grid synchronization by PI controller

The voltage error (Verr) in nth sampling instant is given as,

$\left.\Delta v_{e r r}(n)=v_{d c}^{*}(n)-v_{d c}(n)\right)$                   (18)

The output of PI at nth sampling time is,

$\begin{aligned} i_{i n v}^{*}(n)=i_{i n v}^{*}(n&-1) \\ &+K_{P 1}\left(\Delta v_{e r r}(n)-\Delta v_{e r r}(n-1)\right) \\ &+K_{I 1} \Delta v_{e r r}(n) \end{aligned}$                    (19)

where, dc voltage controller proportionality is denoted as K_P1 and integral gain is denoted as K_I1. The reference currents have been generated with integrated grid potential for the PV inverter. Through this technique, PV inverter is highly proficient in generating the local load along with high current to reference value. When the requirement of load is greater than the production of PV, the grid has provided the necessitated currents.

The actual current in the inverter is compared with reference value in this mode of conduction. The output of PI has produced a change in the duty cycle (d) and it is combined with the static duty ratio to generate the modulating signal.