Faults Detection and Diagnosis of Multilevel Inverter Based on Signal Processing

Multilevel inverter offers interesting advantages such as possibility of operation in medium, high voltage and high power applications, providing a better voltage waveform with low total harmonic distortion for electric machines applications, output filter elimination, dv/dt transient reduction during commutation, low EMI emissions by overvoltages and power loss reduction [1]. Diode-clamped, cascaded-bridges and flying capacitors are the most used multilevel inverters in industry [2-3]. However, the number of switches needed in the topology increases with the number of levels and, although the switches may be highly reliable, a system's fault probability will become increased [4-5]). An unbalanced voltage is generated when a fault occurs which can produce permanent damage to the load or complete system failure [6-7].

Studies about fault detection in multilevel inverter and even fault-tolerant multilevel inverter have been focused on power systems' fault analysis [8-10] as first step to conceive different techniques for obtaining a three-phase balanced output voltage [4-5, 11-12]. Xiao Min analyzed a flying capacitor-based four-level inverter using the material redundancy technique (using extra components) [13]. A cascaded H-bridge multilevel inverter with an additional leg and redundancy technique regarding change of pulse width modulation (PWM) when a fault occurs has also been described [7]. Others [4-6] have shown tolerant control for an asymmetric cascade multilevel inverter using material redundancy. Other works have analyzed a three-level diode clamped multilevel inverter and also used extra components to tolerate faults [14]. Some of these studies used protection functions [15], e.g. passive protection could become activated according to fault time duration [16]. Several papers [17-18] have presented a cascade multilevel inverter and fault-tolerant technique used to change PWM modulation in semiconductor power devices. Others works [19] have dealt with a fault-tolerant system for electrical machines, such as induction motor [20], besides focusing on Aerospatiale applications and electric vehicle applications [21]. Others considered the most common faults in static converters (short and open circuit transistors) [22]. In the same direction, D. Kastha and B. K. Bose considered various fault modes of a two level voltage source PWM inverter system for induction motor drive [23]. They have studied rectifier diode short circuit, inverter transistor base driver open and inverter transistor short-circuit conditions. However, they do not propose to reconFigure the inverter topology.

De Araujo Ribeiro R. L. et al. investigated fault detection of open-switch damage in two level voltage source PWM motor drive systems [24]. They mainly focused on detection and identification of the power switch in which the fault has occurred. In another paper, they investigated the utilization of a two-leg based topology when one of the inverter legs is lost. Then the machine operates with only two stator windings [25]. They proposed to modify PWM control to allow continuous free operation of the drive. E. R. C. Da Silva et al. have studied fault tolerant active power filter system [26]. They proposed to reconFigure power converter and PWM control and examined a fault identification algorithm. T. Benslimane used active filter output currents mean values polarities to detect and localize open switch faults in shunt active three-phase filter based on two level voltage source inverter controlled by current Hysteresis controllers [27]. Surin Khomfoi used artificial neural networks for the diagnostic of open loop PWM controlled cascaded h-bridge multilevel inverter drives. He used inverter output voltages FFT analysis to extract principle component as fault indicators for simultaneous transistor and diode open switch fault [28]. Karimi S. and Pourea P. et al. put into practice an FPGA (Field Programmable Gate Array)-based online fault tolerant control technique of parallel active power filter based on two level three-phase voltage source inverter with redundant leg [29-30].

Most of mentioned works about multilevel inverter faults detection are related to electrical machine drives applications. The few of them, which are related to static applications such as active power filters, considered only two-level voltage source inverter.   

This present paper deals with open transistor faults characterization in cascaded H-bridge Seven-level three-phase PWM controlled shunt active power filter. Phase currents can’t be trusted as fault indicator since their waveforms are slightly changed in the presence of open transistor fault. The proposed method uses H-bridges output voltages to determine the faulty phase, the faulty bridge and more precisely, the open faulty transistor. After a brief description of H-bridge seven-level inverter used as active power filter system in section 2, harmonic currents identification method is presented in section 3 followed by introducing the PWM control technique of seven-level inverter in section 4. Open transistor faults characterization of seven-level inverter is discussed in section 5 based on simulation results and their analysis.   

Figure 2 presents a block diagram of the proposed control system. The major advantage of this control principle is its simplicity and easiness to be implemented. The task of this control is to determine the current harmonic references to be generated by the active filter.

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Figure 2. Block diagram of the harmonic currents identification

They are defined using classical active and reactive power method proposed by Akagi [31].

By supposing that the main power supply voltages are sinusoidal, current harmonic references will be calculated like indicated in [32].

($α, β$) voltage components at coupling point of active filter ($vα, vβ$) and currents ($iα, iβ$) are defined by the classical Concordia transformation:

$\begin{matrix}   \left[ \begin{matrix}   x\alpha   \\   {}  \\   x\beta   \\\end{matrix} \right] & \text{=}\begin{matrix}   {}^{2}/{}_{3} & {} & \left[ \begin{matrix}   1 & {} & -1/2 & {} & -1/2  \\   {} & {} & {} & {} & {}  \\   0 & {} & -\sqrt{3}/2 & {} & \sqrt{3}/2  \\\end{matrix} \right] & \begin{matrix}   {} & \left[ \begin{matrix}   x1  \\   {}  \\   x2  \\   {}  \\   x3  \\\end{matrix} \right]  \\\end{matrix}  \\\end{matrix} & {} & {} & {}  \\\end{matrix}$ (1)

where x={v, vs, i, iL}

The instantaneous real and imaginary powers, noted by p and q, are calculated by:

$\begin{matrix}   \left[ \begin{matrix}   p  \\   {}  \\   q  \\\end{matrix} \right] & \text{=}\begin{matrix}   {} & {} & \left[ \begin{matrix}   v\alpha  & {} & {} & {} & v\beta   \\   {} & {} & {} & {} & {}  \\   -v\beta  & {} & {} & {} & v\alpha   \\\end{matrix} \right] & \begin{matrix}   {} & \left[ \begin{matrix}   i\alpha   \\   {}  \\   i\beta   \\\end{matrix} \right]  \\\end{matrix}  \\\end{matrix} & {} & {} & {}  \\\end{matrix}$ (2)

These powers are then filtered by high-pass filters, which gives ph and qh and the harmonic components of the currents will be:

$\left[ \begin{matrix}   {{i}_{h1}}  \\   {{i}_{h2}}  \\   {{i}_{h3}}  \\\end{matrix} \right]\text{=}\left[ \begin{matrix}   {{i}_{fref1}}  \\   {{i}_{fref2}}  \\   {{i}_{fref3}}  \\\end{matrix} \right]\text{=}\frac{1}{v_{\alpha }^{2}+v_{\beta }^{2}}\left[ \begin{matrix}   1 & {} & 0  \\   -1/2 & {} & -\sqrt{3}/2  \\   -1/2 & {} & \sqrt{3}/2  \\\end{matrix} \right]\left[ \begin{matrix}   {{v}_{a}} & {{v}_{\beta }}  \\   -{{v}_{\beta }} & {{v}_{a}}  \\\end{matrix} \right]\left[ \begin{align}  & {{p}_{h}} \\ & {{q}_{h}} \\\end{align} \right]$ (3)

This section presents analysis of simulation results obtained with PSIM simulator for PWM controlled cascaded H-bridge seven-level three-phase shunt active power filter with normal and faulty open transistors condition. Simulation parameters are:

- Main source grid: $220V, 50 Hz$;

- Non-linear load:

$R1=10 Ohm for t ϵ [0,0.7sec], R1=5 Ohm for t ϵ [0.7,1.5sec], L1=0.005 H, R2=1000 Ohm for t ϵ [0,1.1sec], R2=5 Ohm for t ϵ [1.1, 1.5sec], L2=0.01 H, Ls=0.0015 H$;

- Active filter: $Vdc=300 V, Lf=0.004 H, fp=5000 Hz (PWM carriers frequency), Proportional-integral (PI) regulators: Gain Kp=0.5, time constant Ti=0.001$.

These parameters are chosen to reduce THD of main source currents below 5%. It is noticed that filter output currents are superimposed to their harmonic identified reference currents and that grid source currents are almost sinusoidal (Figure 3.1.b, Figure 3.1.c). It is also remarked that PI output signals (reference signals of PWM control technique: Vref1, Vref2, Vref3) are symmetric (Figure 3.2.d) which produce symmetric output voltages (Va1, Va2, Va3, Vb1, Vb2, Vb3, Vc1, Vc2, Vc3) (Figure 3.2.e) with small mean values Va1mean, Va2mean, Va3mean, Vb1mean, Vb2mean, Vb3mean, Vc1mean, Vc2mean, Vc3mean (Figure 3.3.f).

Faulty phase, faulty bridge and more precisely, open faulty transistor detection is based on the calculation of zero harmonic component (mean value, dc offset) included in H bridges output voltages. This is done by using a second-order low-pass filter with cut-off frequency of 5 Hz and damping ratio of 0.7.

When a transistor is in open fault condition, the PI regulators will output a PWM reference signal in a way to compensate the error due to that faulty transistor. In this case, PWM reference signals will be asymmetric making H bridges output voltages asymmetric too with significant mean values specific to each faulty transistor (Figure 4.2, Figure 4.3, Figure 5, Figure 6, Figure 7 and Figure 8). It is remarked that active filter phase currents are slightly disturbed by the transistor fault keeping small mean values for different non-linear loads (Figure 3.3. f, Figure 4.3). In fact, normal operating bridges in each phase compensate the faulty one especially for low rate currents.  

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Figure 4.2 Reference signals of PWM control technique and bridges output voltages in T11 open fault condition at t=0.4 s

A change in H bridges output voltages waveforms is defined as the instant at which a sudden increase or decrease is observed in the DC offset component of these voltages. A change is considered to have occurred in the H bridges output voltages mean values when they exceeds or falls below a given band (Figure 4.2, Figure 4.3, Figure 5, Figure 6, Figure 7 and Figure 8). 

Phase 1 is linked to bridges H11, H12 and H13. If the open circuit faulty transistor is in phase 1, one of these bridges output voltages will have the maximum mean value ($Va1mean=±62 V, Va2mean=±62 V, Va3mean=±62 V$). If the faulty transistor is in bridge $H11 (T11, T12, T13, T14)$, this latter’s output voltage will have the maximum mean value ($Va1mean=±60 V$) (Figure 4.3.c, Figure 5, Figure 6). If the faulty transistor is in bridge $H12 (T15, T16, T17, T18)$, this latter’s output voltage will have the maximum mean value ($Va2mean=±62 V$) (Figure 7). If the faulty transistor is in bridge H13, this latter’s output voltage will have the maximum mean value ($Va3mean=±62 V$) (Figure 8). If one of the transistors T11 and T12 in bridge H11 is the faulty one, this bridge’s output voltage will have the maximum mean value with negative polarity ($Va1mean=-62 V$). If one of the transistors T13 and T14in bridge H11 is the faulty one, this bridge’s output voltage will have the maximum mean value with positive polarity ($Va1mean=+62 V$).

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Figure 4.3 Phase currents and bridges output voltages mean values in T11 open fault condition at t=0.4s

The first phase three bridges open transistor faults characteristics are classified in Table 1. This table could be implemented practically using simple comparators with predefined threshold of H Bridges output voltages mean values.

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Figure 5. Simulation results of H-bridge seven-level three-phase shunt active power filter in T13 open fault condition at t=0.4s

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Figure 6. Simulation results of H-bridge seven-level three-phase shunt active power filter in T14 open fault condition at t=0.4s

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Figure 7. Simulation results of H-bridge seven-level three-phase shunt active power filter in T15 open fault condition at t=0.4s

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Figure 8. Simulation results of H-bridge seven-level three-phase shunt active power filter in T19 open fault condition at t=0.4 s

Table 1. H Bridges output voltages mean values corresponding to faulty open circuit transistors of phase 1